OHCI Link Controller Testing

Based on QP's OHCI test tools our OHCI test services is second none in terms of speed and test coverage.

Our testings verifies the following OHCI functionality:

Open HCI Registers

Asynchronous Transmit DMA

Asynchronous Transmit Contexts

OUTPUT_MORE

OUTPUT_MORE_Immediate

OUTPUT_LAST

OUTPUT_LAST_Immediate

Asynchronous Transmit Request DMA Context Test Procedure (ATREQ)

Asynchronous Transmit Response DMA Context Test Procedure (ATRES)

1394 Asynchronous Requests (Tx) and Responses (Rx)

Length

Alignment

Interrupts

Speed

Retried request shall not block responses

Asynchronous Receive DMA

Asynchronous Receive Contexts

INPUT_MORE

Asynchronous Receive Request DMA Context Test Procedure (ARREQ)

Asynchronous Receive Response DMA Context Test Procedure (ARRES)

1394 Asynchronous Requests (Rx) and Responses (Tx)

Length

Alignment

Interrupts

Speed

Isochronous Transmit DMA

Isochronous Transmit Contexts

OUTPUT_MORE

OUTPUT_MORE_Immediate

OUTPUT_LAST

OUTPUT_LAST_Immediate

STORE_VALUE

Isochronous Transmit DMA Single Context Test Procedure (ITS)

Isochronous Transmit DMA Multiple Context Test Procedure (ITM)

Isochronous Transmit

Length

Channel

Alignment

Interrupts

Speed

Isochronous Receive DMA

Isochronous Receive Contexts

INPUT_MORE/INPUT_LAST

Isochronous Receive DMA Single Context Test Procedure (IRS)

Isochronous Receive

Packet-per-Buffer Context Mode

Buffer-Fill Context Mode

Self ID Receive DMA

Self ID Receive DMA Test Procedure (SIDR)

selfIDBufferPtr Register

selfIDCount Register

SelfID receive header SelfIDGeneration Field

SelfID receive header Self ID timeStamp Field

Self ID Interrupts

Self ID Received Outside of Bus Initialization Phase

Physical Requests DMA

Filtering Physical Requests

Asynchronous Filter Registers Test Procedure

Physical Request Address Ranges

Physical Request Address Ranges Test Procedure

Physical Request Posted Writes

Posted Writes General Operation Test Procedure

Posted Write Error Conditions

Posted Writes Error Conditions Test Procedure

Physical Response

Physical Response Test Procedure

Physical Request Miscellaneous

Bus Reset Effect on Physical Request Test Procedure

Physical Request Read Error Test Procedure

Multiple DMA Engine

Asynchronous DMA

Isochronous DMA

Asynchronous and Isochronous DMA

Asynchronous, Isochronous, and Physical DMA

Error Handling

Receive Errors

Header CRC Error

Data CRC Error

Data Length Error

Type Error

Transmit Error

Transmit Zero Length Read Response

PHY/Link Interface

Initialization and Reset

Initialization and Reset Test Procedure

Link Request

Bus Request Test Procedure

PHY Register Access While Receiving Data

Acceleration Control Test Procedure

PHY/Link Interface Status

Status Transfer of PHY_Int

PHY/Link Interface Transmit

PHY/Link Interface Transmit Test Procedure

PHY/Link Interface Receive

Electrical characteristics

DC Signal levels and waveforms

AC Timing